Data processing systems often include one or more memory protection units (MPUs) to regulate access to memory devices. A MPU can intercept memory access requests issued by a device and determine whether the requesting device has requisite authority to access the memory. A MPU can be configured to grant or deny access to individual address regions by associating each region with corresponding access privileges using descriptors. In systems with multiple processor cores, each processor core can have its own local MPU that controls memory accesses initiated by that core using one or more local descriptors. In addition, a global MPU may grant or deny accesses initiated by each of the multiple processor cores, and other bus masters, using one or more global descriptors. However, the number of descriptors needed to support many non-contiguous ranges of memory having different access authorities can require significant resource space.